In computer lingo, Front Side Bus, or FSB, is a bus that brings data from the Northbridge to the CPU and vice-versa. The speed with which the data is transferred depends on the ability of the specific hardware used.
FSB Usage and History
FSB is the alternative name for data and address buses in the CPU, defined by the datasheet produced by the manufacturer. This is associated with several CPU buses used on the motherboards, but seldom with data and buses used in the embedded systems.
The FSB serves like a connection between the CPU and the chipset. The Chipset is divided into the Northbridge and Southbridge, and serves as a connection point for the other buses within the system. Buses like the ACP and PCI connect to this chipset in order for data to stream within devices. The secondary buses are usually moved at speeds that are taken from a front side bus clock, but are not essentially synchronous.
Many manufacturers used to publish FSB’s speed in MT/s (megatransfers per second). This changed and they started to publish it in megahertz, mainly because the transfers can be executed in each cycle in clock frequency.
The FSB has the advantage of high flexibility and low cost. There is no hypothetical limit to the numbers of CPUs that can be connected to the FSB, though its performance will certainly be impaired.
Utilizing an FSB is a tradition that is slowly disappearing. This bus used to be a central connection for all the system devices and the CPU, but it has waned with the increased usage of point-to-point buses. The FSB has been recently criticized by AMD as a slow and old technology.
A slow Front Side Bus may be a hindrance and may cause a supposedly fast CPU to slow down. A CPU can actually perform individual instructions quickly, but if it cannot catch data and instructions as fast as it can execute them because of its connection to a slow FSB, the CPU speed is wasted. When this occurs, the CPU is required to wait one or more clock cycles before the memory is able to return its value. A fast CPU may also be delayed when it has to access other devices attached to the FSB.